High Bias Studies on Metal-Insulator-Metal and Metal-Insulator-Semiconductor Tunnel Junctions,

Abstract

Tunnel junctions were fabricated on the grown-oxides of both cleaved single-crystal silicon and evaporated aluminum and have been studied over a wide bias range. At low biases the previously reported inelastic and self-energy structure is observed, while at intermediate biases tunneling into interface states is identified in p-type silicon junctions. At high biases both silicon and aluminum junctions display behavior which cannot be understood within the framework of the average potential barrier model' in particular, aluminum junctions with lead counterelectrodes show both anomalous structure and hysteresis in their I-V characteristics. To explain this behavior, a model is proposed in which (responant) tunneling proceeds via the energy levels of mobile impurities in the barrier. Using this model, the hysteresis data is analyzed in detail in order to extract parameters describing the position and energy distribution of the impurities. These parameters obtained from the hysteresis data are found to simultaneously predict the anomalous I-V structure, indicating the common origin of both effects. (Author)

Document Details

Document Type
Technical Report
Publication Date
May 01, 1972
Accession Number
AD0755656

Entities

People

  • Steven Wade Depp

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Aluminum
  • Compound Semiconductors
  • Crystals
  • Dielectrics
  • Electronics
  • Energy Levels
  • Hysteresis
  • Impurities
  • Metals
  • Quantum Tunneling
  • Semiconductors
  • Single Crystals
  • Solid State Electronics
  • Tunneling
  • Tunnels

Fields of Study

  • Physics

Readers

  • Quantum spin resonance or Electron Paramagnetic Resonance spectroscopy.
  • Semiconductor Device Technology
  • Superconducting Magnet Technology

Technology Areas

  • Microelectronics
  • Microelectronics - Graphene