High Power Pulse Testing of Integrated Circuits.
Abstract
The objective was to augment the competent high power pulse damage work. The failure modes and mechanisms were investigated for integrated circuits when various pin pair combinations were stressed with high power pulses. Attempts were made to correlate the parameters of the high power pulse to the time before secondary breakdown. Pre- and post-test voltage-current measurements were taken on the pin pair combinations to determine if damage had occurred. Failure analyses were performed on selected integrated circuits to determine the failure mechanisms. The predominant failure mechanism observed was flashover with associated metallization melting and alloying. Due to the complicated geometries of the integrated circuits, no correlation was evident between the time before secondary breakdown and any of the measured pulse parameters. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 05, 1972
- Accession Number
- AD0755807
Entities
People
- Henry B. Cook
Organizations
- United States Army Aviation and Missile Command