Multiple Faults in Combinational Logic.

Abstract

The problem of multiple fault detection in combinational logic network is addressed. A number of test set generation procedures are discussed. A couple of methods to reduce number of faults to be considered in test generation procedures are also discussed. The later approaches study topological aspects of networks. An EXCLUSIVE-OR method is developed which yields a general Boolean expression implying the complete test set for any specified multiple fault. This method is compared with other similar approaches appearing in recent literature. (Author)

Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1973
Accession Number
AD0758165

Entities

People

  • B. D. Carroll
  • D. M. Jones
  • H. G. Shah

Organizations

  • Auburn University

Tags

DTIC Thesaurus Topics

  • Demographic Cohorts
  • Detection
  • Information Processing
  • Literature
  • Logic
  • Logic Gates
  • Networks
  • Test Sets

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Systems Analysis and Design