A Survey of Techniques for Analyzing Memory Interference in Multiprocessor Computer Systems,
Abstract
The paper surveys various analytic techniques for studying the extent of memory interference in a multiprocessor system with a crosspoint switch for processor-memory communication. Processor behavior is simplified to an ordered sequence of a memory request followed by a certain amount of processing time. The system is assumed to be bus bound; in other words, by the time the processor-memory bus completes servicing a processor's request the processor is ready to initiate another request and the memory module is ready to accept another request. The techniques discussed include discrete and continuous time Markov chain models, and some approximate analytic methods, viz. diffusion approximation and Strecker's approximation. The results are compared with a simulation model, in which the processing time has an exponential distribution and the memory cycle time is constant. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 01, 1973
- Accession Number
- AD0762524
Entities
People
- Dileep P. Bhandarkar
- Samuel H. Fuller
Organizations
- Carnegie Mellon University