Cellular Logic-in-Memory Arrays.
Abstract
Work is directed towards the evaluation of the system design being developed by the Naval Laboratory for the All Applications Digital Computer (AADC). The work has sought to determine the applicability of the system for the on-line processing of signals from a high-performance intermediate-range radar system. The study included consideration of the Signal Processing Element (SPE), its component Signal Processing Arithmetic Units (SPAU), and the Microprogrammed Control Unit (MCU) as currently developed. Where the current design was found to be inadequate for the task, modifications to the design were sought which would realize the required performance. Details of the analysis are given in the Appendix. The general conclusion is that a single SPAU, as currently designed, would require a speed up by a factor of approximately 8 to meet the application envisioned. A modification to the system concept is proposed to permit the use of up to 8 SPAUs in parallel in such an application.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 29, 1973
- Accession Number
- AD0766471
Entities
People
- Marshall C. Pease
Organizations
- SRI International