An Examination of Two Fault-Tolerant Architectures,

Abstract

Two fault-tolerant computer designs were examined. For each design a functional simulator was implemented and an executive program, recovery software, and application program was coded. The major concern in the executive program development was the handling of input/output and interrupts in the presence of faults. Similarly, the development of the recovery software revealed that the preservation of the application was more difficult than the recovery of the hardware itself. The application was selected from the Titan 3C flight program. A simple compiler was developed to generate the application program code and automatically insert rollback points. This approach eliminated any concern for fault tolerance on the part of the application programmer. However, a significant overhead in terms of memory space and execution time due to fault tolerance resulted. Each design was examined at a functional level relative to its computation capabilities and effectiveness in providing fault tolerance. Weak points were identified in each design and recommendations for correcting them were provided. Neither design completely handled catastrophic failures. (Author)

Document Details

Document Type
Technical Report
Publication Date
Aug 01, 1973
Accession Number
AD0766517

Entities

People

  • David K. Switzer
  • Frank J. O'brien
  • Joseph A. Lauro

Tags

DTIC Thesaurus Topics

  • Application Software
  • Compilers
  • Computations
  • Computer Programs
  • Computers
  • Control Simulators
  • Executives
  • Fault Tolerance
  • Recovery
  • Simulations
  • Simulators

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.
  • Systems Analysis and Design

Technology Areas

  • Space