Techniques for the Design and Evaluation of Self-Checking Systems.

Abstract

The report deals with techniques for the analysis and synthesis of self-checking systems composed of self-checking subsystems. After a brief introduction to the basic concepts of self-checking systems, a graph model for the representation of modules and their interconnections is presented. It is assumed that small self-checking modules can be synthesized by a trial-and-error approach to through the use of two-rail design. Techniques for combining self-checking modules into self-checking systems are discussed and the problem of optimal placement of checkers is considered. A procedure for evaluating the performance of a self-checking system is given. (Author)

Document Details

Document Type
Technical Report
Publication Date
Feb 28, 1974
Accession Number
AD0775909

Entities

People

  • Behrooz Parhami

Tags

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Systems Analysis and Design