Effects of Finite Register Length in the Signal Processing Arithmetic Unit of the AN/UYK-17.

Abstract

Because of finite register length, several kinds of error are introduced in NRL's Signal Processing Arithmetic Unit (SPAU). The SPAU has a 16-bit word length and uses two's-complement, fixed-point, truncated arithmetic. A statistical model for arithmetic roundoff is formulated and used in discussing sources of error in multiplication and addition. Simulation proves a useful tool for studying quantization effects in the two fundamental digital signal processing algorithms, the fast Fourier transform (FFT) and recursive filtering. Simulation results indicate that conditional block scaling should be used, that scaling other than scaling the input should be used for the 4-pole filter to utilize more completely the SPAU's 90-dB dynamic range (6 dB per bit), and that rounding arithmetic should be used in the next version of the SPAU. The possibility of a floating-point machine should be investigated. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jun 12, 1974
Accession Number
AD0781880

Entities

People

  • Judith N. Froscher

Organizations

  • United States Naval Research Laboratory

Tags

DTIC Thesaurus Topics

  • Algorithms
  • Arithmetic
  • Arithmetic Units
  • Digital Signal Processing
  • Dynamic Range
  • Fast Fourier Transforms
  • Filters
  • Filtration
  • Signal Processing
  • Simulations

Fields of Study

  • Engineering

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