Development of a High Level Fast Limiting Switch,
Abstract
This development has application in logic equipment where the low amplitude asymmetric outputs of normal logic circuit families are a disadvantage. The device is driven from normal TTL type signals to give a symmetrical output swing of approximately plys or minus 14.5 volts. The switching speed at the output is as fast as, if not faster than, the driving waveform. Rise or fall times of better than 30 nsec are typical. The circuit can drive a resistive load passing currents of up to 10 mA without deterioration of the waveform. To accommodate the large voltage swings and the need for high gain short storage time complementary transistors, hybrid fabrication techniques are used. The use of a symmetrical circuit without conventional catching diode networks has resulted in a lower mean power consumption with satisfactory operation over the full military temperature range (-40C to +85C) at repetition rates of up to 1 MHz. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1973
- Accession Number
- AD0782207
Entities
People
- C. H. Jones
- C. Sedwell