SYSTEM STUDY FOR LOW POWER SPACEBORNE COMPUTERS.
Abstract
The primary objective of this study was to develop computer techniques and organizations applicable to the design of computers with significantly lower power consumption. The power/speed ratio was selected as the basic design criterion for comparison of the many alternative configurations studied, since a computer system with a minimum power/speed ratio requires the least amount of energy to execute a specific computational task. A number of basic computer configurations were studied including both state-of--the-art versions and improved versions specifically designed to minimize the power/speed ratio. The results of this study clearly indicated that a high-speed parallel organization would give a minimum power/speed ratio. A representative low power system was designed employing a plated wire memory and a parallel processor organized around the use of a high speed integrated circuit memory for information storage. A central data bus system was used for communication between all modules of the system. High probabilities of success for missions of typically one year duration were achieved through the use of redundant modules. The performance of the representative system was three times faster with one-fifth the power consumption resulting in a reduction of the power/speed ratio to one-fifteenth of the state-of-the-art parallel computer.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1966
- Accession Number
- AD0804606
Entities
Organizations
- General Motors