MINIMIZING THE COMPONENTS OF FREQUENCY DIVIDERS BY USING J-K FLIP-FLOPS.

Abstract

A method for constructing a group of fast digital dividers using standard clocked J-K flip-flops is presented. These dividers require no additional logic elements, and the speed of division is therefore only limited by the inherent propagation delay of the J.K. elements. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1968
Accession Number
AD0826521

Entities

People

  • G. L. Assard

Organizations

  • SACLANT ASW Research Centre

Tags

DTIC Thesaurus Topics

  • Frequency
  • Frequency Dividers
  • Logic
  • Logic Elements

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Nuclear Non-Proliferation and International Security