INVESTIGATION OF RELIABILITY TESTING AND PREDICTION TECHNIQUES FOR INTEGRATED CIRCUITS.
Abstract
A procedure to identify and rank the elements of an integrated circuit most likely to cause circuit failures has been developed. An element of an integrated circuit is considered a weak link when one or more of its parameters combines a high importance to the operation of the circuit with a high likelihood of degradation. A method of quantitatively ranking a weak link in terms of a Weakness Factor (W) is discussed. Attempts were made to measure those circuit elements showing the highest Weakness Factors. Many of these measurements were not specified on the device data sheets and are called 'nonfunctional.' The results show that these measurements can greatly improve selectivity but are somewhat marginal in improving sensitivity in detecting element degradation. Four integrated circuits of varying complexity and function were evaluated. The results are discussed in this report. The devices are: SN347A - Saturating DTL NAND Gate; SN5472 - Master-Slave J-K Flip Flop; SN1230 - Nonsaturating ECL OR-NOR Gate; SN5510 - Linear Differential Amplifier.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 01, 1968
- Accession Number
- AD0830066
Entities
People
- Darrell R. Fewe
- Po-ching Liu
- Walter L. Gill
- William F. Miller
Organizations
- Texas Instruments