Charge-Coupled Circuits.
Abstract
This report describes the operation and the applications of charge-coupled shift registers for analog and digital signals. Silicon-gate construction is proposed for achieving high-performance, high-density structures, and also two-phase charge-coupled devices. The effect of the fringing fields externally induced by the phase-voltage pulses is analyzed; also, the relative importance of the thermal diffusion and the internally inducted drift field due to an uneven charge distribution is considered. Simple signal-regeneration stages for digital charge-coupled shift registers are described, and their operation is demonstrated by charge-coupled circuits made by a p-MOS process. A charge-transfer efficiency of about 99.6% per electrode at a clock frequency of 1 MHz was obtained in the operation of 3-phase 8-bit shift registers made by the p-MOS process. The feasibility of self-scanning charge-coupled photo-sensor arrays for video signal is briefly discussed. The study shows that charge-coupled devices can be used for high-packing-density digital shift registers or memories. Logic circuits that operate with electrical or optical inputs can be made with charge-coupled devices. Such a charge-coupled circuit is expected to have a packing density of about 1 sq. mil of silicon area per bit of information and for a bit rate of 10 to the 7th power bits/sec a power requirement of about 20 microwatts per bit. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 01, 1971
- Accession Number
- AD0883359
Entities
People
- Walter F. Kosonocky
Organizations
- Sarnoff Corporation