Distributed Fetch Computer Concept Study. Part I. Concepts and Applications.

Abstract

A Distributed Fetch Parallel Processing system has been developed which provides all of the advantages of multicomputers and multiprocessors and none of the associated disadvantages. The architecture is primarily composed of several independent asynchronous subsystems each of which can operate as a fully capable memory controller, bus controller and computational element. The system is expandable merely by the introduction of additional subsystems to the single system bus. A simple addressing scheme permits the full memory of the entire system to be available to all of the processors. Complex interrupt mechanisms have been eliminated by the incorporation of a device whereby the receiving unit is always available to receive incoming requests. All of the building-block elements have sufficient flexibility to provide the system with the ability to perform in applications that were previously considered inappropriate for multiprocessor/multicomputer structures, as well as those that conventionally fall within that province. Specialized configurations are adaptable to such problems as radar processing without violating any of the system concepts. (Author)

Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1972
Accession Number
AD0893118

Entities

People

  • Alan J. Deerfield
  • Barry J. Tanenbaum
  • Jacob Baker
  • Stanley M. Nissen

Organizations

  • Raytheon Missiles & Defense

Tags

DTIC Thesaurus Topics

  • Addressing
  • Computers
  • Multiprocessors
  • Parallel Computing
  • Parallel Processing
  • Processing Equipment
  • Resilience

Readers

  • Parallel and Distributed Computing.
  • Systems Analysis and Design