Theoretical and Experimental Study of Use of Junction FET Digital Integrated Circuits in Radiation Environments.

Abstract

The purpose of this contract was to investigate in detail the feasibility of using digital junction FET integrated circuits in radiation environments. Fabrication processes for making junction FET integrated circuits were developed and characterized. Two types of inverting logic gates were designed and fabricated and these circuits operated successfully after irradiation with 10 to the 15th power n/sqcm and 10 to the 9th power rads of low energy electrons. The pulsed ionizing radiation failure level for flip-flop circuits was 10 to the 8th power rads/second on 10 MeV electrons. JFET circuits have shown improvements compared to available transistor-transistor logic circuits in neutron irradiation resistance and low energy electron irradiation resistance. However, the circuits studied were slower than TTL circuits -- 40-60 ns gate delays compared to 5-15 ns gate delays for TTL and resistance to pulsed ionizing irradiation was lower. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jul 03, 1972
Accession Number
AD0903975

Entities

People

  • Douglas L. Peltzer
  • Robert L. Berry

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Circuits
  • Electron Irradiation
  • Electrons
  • Field Effect Transistors
  • Flip Flop Circuits
  • Integrated Circuits
  • Ionizing Radiation
  • Logic
  • Logic Gates
  • Neutron Bombardment
  • Radiation
  • Resistance
  • Subatomic Particles
  • Transistor Transistor Logic
  • Transistors

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Nuclear and Radiation Engineering.

Technology Areas

  • Microelectronics