Silicon on Sapphire Transistor Development.
Abstract
The semiconducting properties of 0.5 micrometers silicon films heteroepitaxially deposited on sapphire and spinel substrates are strongly influenced by the chemical and physical nature of the silicon-substrate interface. The nature of the interface is in turn a function of the manner in which the work damage is removed from the fabricated substrate surface, the conditions of the heteroepitaxial growth, and the type and orientation of the substrate. It has been observed that there is a relationship between the rate at which the substrate surface is covered and the semiconducting properties of the 0.5 micrometers thick films. A growth method (the burst technique) has been developed in which the source gases are rapidly introduced into the deposition chamber in order to initiate very rapid first growth and high rates of surface coverage. X-ray techniques have been used to characterize the nature of the heteroepitaxial silicon on sapphire hemispheres. The silicon adjacent to the substrate surface has been examined by transmission electron microscopy. The effective mobility and the junction leakage current of MOS-silicon-on-insulator transistor structures have been measured as a function of the heteroepitaxial silicon thickness and as a function of the silicon growth techniques. Effective mobilities have been observed in MOS transistors fabricated in 0.5 micrometers thick burst grown silicon which are similar to mobilities in 1.0 micrometers standard grown silicon. Improvement in the minority carrier lifetime has been realized by use of the burst growth technique. Working bipolar transistors have been fabricated in 2.5 and 5.0 micrometers thick silicon on sapphire using ion-implantation techniques. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1973
- Accession Number
- AD0912256
Entities
People
- Achilles G. Kokkas
- Glenn W. Cullen
- Jack F. Corboy
Organizations
- Sarnoff Corporation