High Speed Parallel to Serial to Parallel Multiplexers.
Abstract
This report describes the design and development of a high speed multiplexer/demultiplexer system with digital circuits capable of operating at subnanosecond switching speeds and at serial data rates through 1 gigabit per second. The equipment developed consists of a high speed 8-to-1 digital multiplexer, a high speed 1-to-8 digital demultiplexer, and an 8-to-48 line data-expander. An eight line pattern generator (synchronous binary counter) is incorporated within the multiplexer unit alond with a sync code generator and a parity generator. In the normal mode of operation the multiplexer accepts 8-bit words (6 data bits, 1 parity bit, 1 sync bit) and multiplexes these up to a single 1Gb/s serial data stream. The demultiplexer unit accepts the 1Gb/s serial NRZ data and demultiplexes it back to parallel 8-bit groupings. The data expander searches these eight parallel lines for the sync code, regroups the incoming bits back into the original 8-bit words, and expands these words to a six/word synchronous parallel interface. A D/A converter is provided within the data expander unit to allow conversion of the binary count sequence input to the multiplexer to a staircase waveform. The system provides considerable flexibility and was specifically designed for variable frequency operation from dc to beyond 1 Gb/s. The high speed multiplexing, demultiplexing, and timing for these functions is performed by thin film hybrid logic circuits that exhibit gate speed-power products of 10 picojoules, and latch flip-flop performance of 20 megahertz per milliwatt. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 1973
- Accession Number
- AD0912518
Entities
People
- John D. Hyde
- Kenneth B. De Graaf
- M. Dave Reddy
Organizations
- TRW Inc.