Memory for Radar Parameter Study. Volume 1. Interpretation and Analysis.
Abstract
This report presents the results of an independent study of Synthetic Aperture Radar (SAR) and SAR-based multimode radar digital signal processor memory requirements to complement other work being done under the direction of the contracting agency in developing charge-coupled devices (CCD's). This study was limited to shift registers. The approach used was: (1) to acquire a data base to determine the characteristics of memory devices used in present and future digital signal processors, with emphasis on SAR applications, (2) to identify applications which may be suitable for CCD shift registers, (3) to discuss desirable features and characteristics of possible CCD shift registers for such applications, and (4) to compare CCD and MOS shift registers and the influence of the memory on the cost of ownership of SAR processors. The data base was obtained both from internal Westinghouse sources and previously published AFAL technical reports. The CCD device characterization was entirely internal to Westinghouse because the AFAL sponsored CCD device work being performed concurrently is not available. Both serpentine and Series-Parallel-Series devices were studied. The study emphasizes trade-offs rather than conclusions; however, there is a strong indication that large CCD arrays have the potential to reduce the cost of some large memory units such as SAR main memories and display refresh memories. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 01, 1974
- Accession Number
- AD0918027
Entities
People
- Donald R. Lampe
- William R. Webb