Hardware-Enabled Security Through On-Chip Reconfigurable Fabric
Abstract
The goal of this project was to enable hardware-based security techniques on future microprocessors in a way that they can be added and updated after fabrication, similar to software, while maintaining the efficiency and the security of hardware. For this purpose, the project investigated programmable architectures based on processing cores, on-chip reconfigurable fabric, and custom accelerators where security techniques can be implemented after chip fabrication. The study showed that such programmable architectures can indeed support a broad range of run-time monitoring techniques that detect errors and attacks with low overhead. The project also enabled fine-grained run-time monitoring for real-time systems by developing static and dynamic mechanisms to ensure that a monitored system still meets real-time deadlines. In addition to run-time monitoring, the project also investigated exploiting inherent variations and noise in off-the-shelf Flash memory to build hardware security functions, and showed that Flash memory can be used to securely hide information.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 05, 2016
- Accession Number
- AD1009612
Entities
People
- G. E. Suh
Organizations
- Cornell University