Reducing Response Time Bounds for DAG-Based Task Systems on Heterogeneous Multicore Platforms

Abstract

This paper considers for the first time end-to-end response time analysis for DAG-based real-time task systems implemented on heterogeneous multicore platforms. The specific analysis problem that is considered was motivated by an industrial collaboration involving wireless cellular basestations. The DAG-based systems considered herein allow intra-task parallelism: while each invocation of a task (i.e.,DAG node) is sequential, successive invocations of a task may execute in parallel. In the proposed analysis, this characteristicis exploited to reduce response-time bounds. Additionally, there is some leeway in choosing how to set tasks relative deadlines. It is shown that by resolving such choices holistically via linear programming, response-time bounds can be further reduced. Finally, in the considered use case, DAGs are defined based upon just a few templates and individually often have quite low utilizations. It is shown that, by combining many such DAGs into one of higher utilization, response-time bounds can often be drastically lowered. The effectiveness of these techniques is demonstrated via both case-study and schedulability experiments.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 2016
Accession Number
AD1014923

Entities

People

  • James H. Anderson
  • Kecheng Yang
  • Ming Yang

Organizations

  • University of North Carolina at Chapel Hill

Tags

Communities of Interest

  • C4I
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Case Studies
  • Computer Programming
  • Computer Science
  • Concrete
  • Consumers
  • Embedded Systems
  • Linear Programming
  • Multiprocessors
  • North Carolina
  • Optimization
  • Platforms
  • Scheduling (Production)
  • Template Patterns
  • Three Dimensional
  • Time Intervals
  • Two Dimensional
  • Urban Areas

Fields of Study

  • Computer science
  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Parallel and Distributed Computing.