Metrics for Analyzing Quantifiable Differentiation of Designs with Varying Integrity for Hardware Assurance

Abstract

This work proposes an approach to quantifying the integrity of a questionable design by parsing the design into characteristic sub-domains: Logical Equivalence, Signal Activity Rate, Functional Correctness, Structural Architecture, and Power Consumption. Measurement techniques are reviewed for each domain which quantify deviation of the actual design away from the expected profiles. A novel method for quantifying the quality of reference used for expected profiles is also proposed. Expected profiles can incorporate a level of overdesign. Finally, the Design Integrity measuring techniques are applied to five Test Article (TA) cases that showed Error 2 TA to have the lowest integrity of 2.95/5 and the untampered TA containing the highest integrity of 5.00/5.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 2017
Accession Number
AD1041893

Entities

People

  • Adam Kimura
  • Brian Dupaix
  • Gregory L. Creech
  • Matthew J. Casto
  • Steven B. Bibyk

Tags

Communities of Interest

  • Advanced Electronics
  • Cyber
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Air Force
  • Denial Of Service Attack
  • Economic Impact
  • Energy Consumption
  • Engineering
  • Equations
  • Hardware Assurance
  • Information Science
  • Internet Of Things
  • Microelectronics
  • Military Research
  • Specifications
  • Standards
  • Structural Analysis
  • Structural Integrity
  • Supply Chain
  • Verification Tests

Readers

  • Computational Modeling and Simulation
  • Positioning, Navigation, and Timing (PNT) Technology.
  • Systems Analysis and Design