Broadband Model of a Stacked Power Switching Module for Parasitic Inductance Extraction

Abstract

Parasitic inductance due to the sizeable lead lengths and component spacing typical in planar packaging can cause significantly impaired switching characteristics. This is of particular concern in metal-oxide-semiconductor field-effect transistor half-bridge modules, due to the effects of signal overshoot that are endemic in high-speed switching applications. Multi-functional components (MFCs) used as concurrent electrical, thermal, and mechanical module elements, and implemented in a stacked module design, can reduce parasitic degradation of power switching modules over a broad range of frequencies and applications. Devices stacked between copper layers with an integrated heat sink have been modeled from 1 kHz to 100 MHz to evaluate the efficacy of this design approach. This report derives the broadband parasitic inductance of the stacked module design, using magnetic field simulations that account for wide variations in skin depth through boundary layer meshing and compares the results to a commercially available, state-of-the-art half-bridge module.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Sep 01, 2018
Accession Number
AD1061343

Entities

People

  • Steven Kaplan

Organizations

  • United States Army Research Laboratory

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Boundaries
  • Boundary Layer
  • Broadband
  • Computer-Aided Design
  • Electronics
  • Electronics Laboratories
  • Frequency
  • Impedance
  • Inductance
  • Layers
  • Magnetic Fields
  • Metal Oxide Semiconductors
  • Power Electronics
  • Semiconductor Devices
  • Semiconductors
  • Silicon Carbide
  • Simulations

Readers

  • Fluid Dynamics.
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics
  • Space