Accelerating FPGA Assurance Analysis via Channel Slicing
Abstract
FPGAs excel at parallelization and are widely used in applications that process high volumes of streamed data. Such designs duplicate their processing functions across multiple channels. A newly developed algorithm slices FPGA firmware along channel boundaries and maps the components between them. This technology simplifies trust and assurance analysis by enabling formal equivalence checking between channels.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 25, 2019
- Accession Number
- AD1075328
Entities
People
- John Hallman
- Stephen Baka