RHBD Techniques for a Sub-Sampling Phase-Locked Loop in 32nm PD-SOI

Abstract

This work details radiation-hardened by design (RHBD) techniques applied to a 15GHz sub-sampling quadrature phase-locked loop (PLL) in the 32nm partially-depleted silicon-on-insulator (PD-SOI) technology node. Radiation vulnerabilities are identified and both component and system level techniques are utilized to mitigate them. This work will provide RF circuit RHBD insight at 32nm PD-SOI and contribute to existing RHBD infrastructure.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Mar 25, 2019
Accession Number
AD1076077

Entities

People

  • E.W.T. Richards
  • J. S. Kauppila
  • L. W. Massengill
  • T. D. Loveless
  • Timothy D. Haeffner
  • W. T. Holman

Organizations

  • Vanderbilt University

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Bandwidth
  • Closed Loop Systems
  • Communication Systems
  • Computer Science
  • Control Systems
  • Degradation
  • Detection
  • Detectors
  • Electrical Engineering
  • Feedback
  • Frequency
  • Frequency Dividers
  • Frequency Modulation
  • Radiation
  • Resonant Frequency
  • Simulations
  • Steady State

Fields of Study

  • Physics

Readers

  • Control Systems Engineering.
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design

Technology Areas

  • Microelectronics