Ultra-low-power RRAM-based FPGA: A Road towards Reconfigurable Edge Computing
Abstract
The trends in Internet-of-Thing (IoT) require specialized hardware systems to be more computing capable than ever while at the same time satisfying an ultra-low power budget. Field Programmable Gate Arrays (FPGAs), thanks to their reconfigurable nature, have been an ubiquitous media in many edge computing systems. However, low-power FPGAs generally suffers from large delay degradation (up to 2), missing to achieve the computing capability required by many modern edge computing applications. In this paper, we investigate the opportunity of using Resistive Random Access Memories (RRAMs) in ultra-low-power FPGA architectures. We (i) evaluate the circuit design aspects of RRAM-based routing multiplexers; (ii) introduce a novel design flow to accurate analyze FPGA architectures; and (iii) study the opportunity of building near-Vt RRAM-based FPGA. Full-chip layouts and SPICE simulations present that at nominal operating voltage, RRAM-based FPGAs can improve up to8%/22%/16% in area/delay/power, as compared to SRAM-based counterparts. Compared to SRAM-based FPGAs working at its nominal voltage, a near-Vt RRAM-based FPGAs can outperform by about 2 the Energy-Delay Product without delay overhead.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 25, 2019
- Accession Number
- AD1076102
Entities
People
- Edouard Giacomin
- Natan Chetrit
- Pierre-Emmanuel Gaillardon
- Xifan Tang
Organizations
- University of Utah