Adaptive-Hybrid Redundancy MIPS Version 2.2

Abstract

This report describes in detail the architecture of an Adaptive-Hybrid Redundancy (AHR) MIPS processor based upon the Basic MIPS processor and Triple Modular Redundancy (TMR) processor. The AHR MIPS processor is the result of Adaptive-Hybrid Redundancy for Radiation-Hardening research and combines TMR and Temporal Software Redundancy. The AHR MIPS processor is hybrid in that it utilizes both hardware and software redundancy. It is adaptive because it has the capability to switch between TMR and TSR modes. There may be many other applications for the AHR MIPS processor beyond this specific research area.

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Document Details

Document Type
Technical Report
Publication Date
Sep 12, 2019
Accession Number
AD1083727

Entities

People

  • Nicolas S. Hamilton

Organizations

  • Air Force Institute of Technology

Tags

DTIC Thesaurus Topics

  • Abstracts
  • Air Force
  • Air Force Facilities
  • Contracts
  • Governments
  • Hardening
  • Radiation
  • Radiation Hardening
  • Redundancy
  • United States

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Parallel and Distributed Computing.
  • Wave Propagation and Nonlinear Chaotic Dynamics.