System-Level Design and Simulation of Nanomemories and Nanoprocessors

Abstract

This paper describes in detail system designs and system simulations for electronic nanocomputers that are integrated on the molecular scale. These systems are considered here as consisting primarily of the combination of two component subsystems, nanomemories and nanoprocessors. Challenges are enumerated for the design and development of both of these ultra-densely integrated components. Various system level designs or architectures are presented that have been proposed to meet these challenges. Detailed consideration is given for both nanomemories and nanoprocessors to system designs that are based upon arrays of crossed nanowires. In each case, a system simulation is performed to assess and to help optimize the prospective performance of the system component in advance of its fabrication. In the ongoing development of crossbar nanocomputer systems, these simulations have been integral to the refinement of designs because they assist in reducing the time and cost of such development.

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Document Details

Document Type
Technical Report
Publication Date
Oct 09, 2006
Accession Number
AD1106868

Entities

People

  • Carl A. Picconatto
  • Garrett S. Rose
  • James C. Ellenbogen
  • Matthew M. Ziegler
  • Shamik Das

Organizations

  • MITRE Corporation

Tags

DTIC Thesaurus Topics

  • Circuit Analysis
  • Computer Programming
  • Construction
  • Electronics Industry
  • Electronics Laboratories
  • Fabrication
  • Field Effect Transistors
  • Field Programmable Gate Arrays
  • Integrated Circuits
  • Logic Gates
  • Manufacturing
  • Molecular Electronics
  • Nanocircuits
  • Nanoenergetics
  • Nanomaterials
  • Nanoscale Devices
  • Nanotechnology
  • Self Assembly
  • Semiconductors
  • Silicon Compounds
  • Three Dimensional

Readers

  • Integrated Circuit Design and Technology.
  • Naval Engineering and Maritime Security
  • Software Engineering

Technology Areas

  • Microelectronics