Modeling and Simulation of Error Code based SEU Radiation Hardening for Computational and Boolean Logic Elements (CORRECT)

Abstract

The main objective of the CORRECT program was to investigate the applicability of Residue Arithmetic Coding (RAC) to mitigate single-event upsets in the arithmetic and Boolean processing components of computing logic chains. The potential impact of this work is an alternative approach to hardening with much lower overhead compared with conventional methods (e.g. triple-modular redundancy). Over the 18 months of the program, an algorithm trade-off study and the design of basic residue hardened basic logic elements were successfully performed.

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Document Details

Document Type
Technical Report
Publication Date
May 30, 2014
Accession Number
AD1109112

Entities

People

  • Jonathan Ahlbin
  • Michael Bajura
  • Michael Fritze
  • Michel Sika

Organizations

  • Information Sciences Institute

Tags

Communities of Interest

  • Energy and Power Technologies
  • Engineered Resilient Systems

DTIC Thesaurus Topics

  • Application-Specific Integrated Circuits
  • California
  • Circuits
  • Computations
  • Computer-Aided Design
  • Computers
  • Contracts
  • Control Systems
  • Detection
  • Detectors
  • Electronics
  • Fabrication
  • Fault Tolerance
  • Filtration
  • Hardening
  • Information Science
  • Logic
  • Logic Elements
  • Logic Gates
  • Nand Gates
  • Radiation
  • Radiation Hardening
  • Reliability
  • Semiconductors
  • Simulations

Readers

  • Computer Programming and Software Development.
  • Integrated Circuit Design and Technology.
  • Life Cycle Cost Analysis