A Cross-Layer Framework For Cost-Effective Intellectual Property (IP) Protection

Abstract

This report summarizes the progress on the Efficient Cross-Layered IP Protection Scheme (ECLIPSE) project. In addition to developing security metrics and proofs, we apply the proposed stripped-functionality logic locking (SFLL) technique and demonstrate it on a field-programmable gate array (FPGA) platform. The report also highlights our efforts towards protecting multiple outputs of circuit, unlocking circuits using machine learning, and developing a logic tool that implements different variants of logic locking. The report also summarizes the latest benchmarking and red-teaming efforts on our defense as part of Cybersecurity Awareness Worldwide 2019 competition, which was the first logic locking contest.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 2021
Accession Number
AD1122333

Entities

People

  • Farinaz Koushanfar
  • Jeyavijayan Rajendran
  • Ozgur Sinanoglu
  • Yiorgos Makris

Organizations

  • New York University
  • University of California, San Diego
  • University of Texas at Dallas

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies
  • Engineered Resilient Systems
  • Space

DTIC Thesaurus Topics

  • Air Force
  • Algorithms
  • Application-Specific Integrated Circuits
  • Case Studies
  • Central Processing Units
  • Computer Programming
  • Computers
  • Contracts
  • Cryptography
  • Digital Signal Processing
  • Electronics
  • Energy Consumption
  • Fabrication
  • Field Programmable Gate Arrays
  • Genetic Algorithms
  • Governments
  • Information Science
  • Integrated Circuits
  • Intellectual Property
  • Machine Learning
  • Neural Networks
  • Semiconductors
  • Standards

Fields of Study

  • Computer science

Readers

  • Cybersecurity.
  • Distributed Systems and Data Platform Development
  • Integrated Circuit Design and Technology.

Technology Areas

  • AI & ML
  • AI & ML - DoD AI Strategy
  • Cyber