Commuting Compositions for Quantum Circuit Reduction
Abstract
Quantum circuit simplication improves program execution on quantum hardware by reducing error from prolonged environmental interaction and noisy gate operations. One simplication technique is template matching, which repeatedly conducts local optimization by replacing small sequences of gates within a circuit by optimized versions. Underlying this method is the problem of identifying sequences matching templates. This is challenging because some, but not all, gates can commute within a circuit. This means there may not be a subcircuit that matches a template in the original circuit specication, but a match may exist in an equivalent rearrangement of gates. In such cases, certain reductions are possible only after the consideration of alternative gate orderings. This research focuses on the identication of commuting gate sequences in support of circuit reduction. In particular, this work generalizes the notion of commuting gates and layers to n-layer commuting compositions and identies all three-layer commuting compositions composed of Tooli, CNOT, and NOT gates for circuits with three to ve qubits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2021
- Accession Number
- AD1132217
Entities
People
- Brenna R Cole
Organizations
- Air Force Institute of Technology