Advanced Voltage Variation Aware Timing Analysis and Reporting (AVATAR)
Abstract
This program developed a new methodology to accurately predict the voltage and timing of digital integrated circuits such that it would the designer may reduce the effective gate level induced timing slack to mitigate trojan insertion on critical nodes. This work utilizes modeling the voltage drop and voltage noise pre-fabrication, and with training a Neural Network post-fabrication, technique to improve the timing model collected during timing closure and produces a Neural assisted Golden Timing Model (NGTM) for side channel delay-signal analysis. The Neural Network acts as a process tracking watchdog for correlating the static timing data (produced at design time) to the delay information obtained from clock frequency sweeping test.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 2021
- Accession Number
- AD1149070
Entities
People
- Avesta Sasan
Organizations
- George Mason University