Analog Circuit Systems for Memristor-Based Neuromorphic System
Abstract
In this project, an innovative circuit system was designed and implemented. It consists of a global circuit cell that supports the entire system and many local cells that support massively parallel I/O of the memristor crossbar arrays (MCAs). The I/O circuits use the pulse width modulated (PWM) signals as the computation variable. Specifically, performers designed and implemented the global delay-locked loop (DLL) and local phase detector (PD) to generate the PWM signals, and the active current mirror, the trans-impedance amplifier (TIA), and the integrated successive approximation register analog-to-digital convertor (SAR-ADC) to scale, measure and digitize the current from the MCA. Performers also develop a printed circuit board (PCB) to evaluate MCA.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 25, 2022
- Accession Number
- AD1169761
Entities
People
- Hao Jiang
Organizations
- San Francisco State University