Federal Research: The SEMATECH Consortium's Start-up Activities

Abstract

SEMATECH's annual operating plans have established an initial three-phased, 5-year approach to achieve parity with Japan in phase two and regain world manufacturing leadership in phase three. This approach will develop semiconductor-manufacturing equipment and materials needed to decrease the linewidth, or diameter, of integrated circuits from the current, phase-one level of technology of 0.8 microns to the next generations of technology-0.5 microns in phase two and 0.35 microns in phase three. (A micron is a millionth of a meter.) This miniaturization will enable manufacturers to increase the components on a semiconductor and, therefore, enable computers to increase data storage capacity and decrease processing time.

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1989
Accession Number
AD1176726

Entities

People

  • J. D. Peach
  • James P. Viola
  • Joe D. Quicksall
  • John A. Thomson
  • John E. Clary
  • Lowell Mininger
  • Richard Cheston

Organizations

  • United States Government Accountability Office

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Advanced Manufacturing
  • Assembly
  • Business Administration
  • Commerce
  • Congress
  • Electronics Industry
  • Employment
  • Fabrication
  • High Definition Television
  • Integrated Circuits
  • Intellectual Property
  • Manufacturing
  • Manufacturing Engineering
  • National Security
  • Organizational Structure
  • Semiconductor Devices
  • Semiconductor Manufacturing
  • Semiconductors
  • Test Equipment

Readers

  • Defense Technology Research and Development.
  • Optical Physics and Photonics.
  • Systems Analysis and Design

Technology Areas

  • Microelectronics