Design Approaches for Efficient Reconfigurable Neuromorphic Systems
Abstract
RAVENS was both about refining circuit-level designs for more robust integration and also pointing toward how these memristive mixed-signal elements can be integrated into full neuromorphic systems. To that end, this work also included the development of standard cells, memory generators, refined I/O cells, interconnect circuitry along with other components and tools necessary for realizing full system-on-chip designs using hybrid CMOS-memristive technologies. This work included necessary add-on features and modifications to the process design kit (PDK) from SUNY Poly to reflect the added layers in the manufacturing process used to realize both memristors and CMOS on the same substrate. Since the SUNY Poly process and associated PDK were being developed as we worked through other design requirements, we also prototyped pure digital components (e.g. scan chain logic, basic memory, RISC-V core logic) using a commercial CMOS process. This commercial tapeout allowed us to test some of the key design elements required for the more digital parts of the RAVENS system, including the automated design flows developed to more efficiently integrated CMOS and memristive components. The culmination of this work was a CMOS-memristive system design that has recently been fabricated by SUNY Poly.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 2023
- Accession Number
- AD1192179
Entities
People
- Garrett S. Rose
Organizations
- University of Tennessee