Security Aware High-Level Synthesis (SHINE)
Abstract
This effort, Security Aware High-Level Synthesis (SHINE), explored development of a comprehensive framework for security assurance during microelectronics design. The effort was twofold: (1) methods and tools to systematically analyze security and vulnerabilities introduced during high level synthesis (HLS) translation and (2) developing mitigation strategies of HLS to produce register transfer level (RTL) designs secure-by-construction. The objective is to produce RTL codes that are inherently both efficient and secure. SHINE aims to enhance the security verification and validation of hardware designs by detecting and addressing security vulnerabilities during the early stages of the design process to prevent propagation of vulnerabilities to lower stages of the design (such as gate-level and layout) where such weaknesses are significantly more difficult to identify and mitigate.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 2023
- Accession Number
- AD1198003
Entities
People
- Farimah Farahmandi
- Mark Tehranipoor
Organizations
- University of Florida