Conduction Channel Engineering in Memristor for Synapse
Abstract
In this AFRL-sponsored program, we have made significant progress in three levels: device, circuit, and applications. On the device level, we invented a new device structure and tunning process to improve the continuous conductance tunning range of memristors. This is enabled by strategically deploying Pt islands into the dielectric switching layer of memristors to divide a single filament into subsections responsible for the coarse-and-fine tuning of the memristor respectively. Through the hybrid tuning of two sub-filaments, the dynamic tuning range of the memristor increases dramatically. On the circuit side, we implemented linear and quadradic programming (LP/QP) optimization solver circuits, which can solve LP/QP optimization problems much faster than conventional computers. The heart of this circuit is a memristor crossbar. The cost function and equality/inequality constraints are mapped onto the conductance states of memristors. When the circuit reaches the stable state, the answer to the LP/QP problem can be extracted from the voltages of each column. On the application level, we invented a hybrid analog-digital cerebellum (sensor fusion motion control) enabled by memristors for a simple mobile robot. Using a model-free optimization method, the mobile robotic system can tune the conductance states of memristors adaptively to achieve optimal control performance. The robot using this cerebellum has a much better performance than using traditional digital circuits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 01, 2023
- Accession Number
- AD1198499
Entities
People
- Buyun Chen
- Deming Meng
- Hao Yang
Organizations
- University of Southern California