A Tensorflow to Real-Time Machine Learning (RTML) Compiler
Abstract
This project developed techniques for compiling deep learning models to silicon hardware with a computation mapping and schedule. The key results are (i) a novel technique to effect mapping and scheduling of deep learning model computations on hardware, and (ii) a proof-of-concept energy-efficient hardware implementation capable of both training and inference tasks.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 25, 2023
- Accession Number
- AD1206486
Entities
People
- Lis Miesko
Organizations
- University of British Columbia