Coherent Interconnect and Field Programmable Gate Array (FPGA) Enabling Reuse (CIFER)

Abstract

This material is based on research sponsored by the Air Force Research Laboratory (AFRL) and the Defense Advanced Research Projects Agency (DARPA) under agreement number FA8650-18-2-7852. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon.

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Document Details

Document Type
Technical Report
Publication Date
Oct 13, 2023
Accession Number
AD1212842

Entities

People

  • Christopher Batten
  • David Wentzlaff

Organizations

  • Cornell University
  • Princeton University

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Air Force
  • Air Force Facilities
  • Air Force Research Laboratories
  • Application-Specific Integrated Circuits
  • Computing System Architectures
  • Debugging
  • Diagrams
  • Directories
  • Field Programmable Gate Arrays
  • Governments
  • Instruction Set Architecture
  • Instructions
  • Intellectual Property
  • Language
  • Semiconductors
  • Software Testing
  • Xml

Readers

  • Integrated Circuit Design and Technology.
  • Military and Counterinsurgency Studies.
  • Theoretical Analysis.