An Intelligent Design Environment For Asynchronous Logic (IDEAL)

Abstract

This project developed an open-source layout generator for the design and implementation of digital asynchronous circuits. To realize the goals of the Intelligent Design of Electronic Assets (IDEA) program for an open-source "no human in the loop" circuit layout generator, tools were created that support a modular and hierarchical design method that maximally decouples front-end design details and automation flows from proprietary foundry rules, models, and design kits. Individual modules can be designed using any methodology, but the global chip design adopts an asynchronous approach to integration and modular composition.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Jun 01, 2024
Accession Number
AD1230529

Entities

People

  • Keshav Pingali
  • Martin Burtscher
  • Matthew Guthau
  • Prasad Joshi
  • Rajit Manohar

Organizations

  • Intel Corporation
  • Texas State University
  • University of California, Santa Barbara
  • University of Texas at Austin
  • Yale University

Tags

Fields of Study

  • Computer science

Readers

  • Electrical Engineering
  • Integrated Circuit Design and Technology.
  • Software Engineering.

Technology Areas

  • Microelectronics
  • Microelectronics - Microelectromechanical Systems