Evaluation of Instruction Set Processor Architecture by Program Tracing

Abstract

The thesis develops and evaluates methods for evaluation of the architecture of instruction set processors (ISPs). (An ISP is the logical processor defined by the instruction set, independent of physical implementation). The methods are based on analyzing traces of program executions which contain information about every instruction executed. The main advantages of the methods are: They permit a very detailed study of ISP behavior; they are not restricted to specific languages or processors; and, they are easily programmed.

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Document Details

Document Type
Technical Report
Publication Date
Jul 01, 1974
Accession Number
ADA004824

Entities

People

  • Amund Lunde

Organizations

  • Carnegie Mellon University

Tags

Communities of Interest

  • C4I

DTIC Thesaurus Topics

  • Algorithms
  • Computational Science
  • Computer Architecture
  • Computer Programming
  • Computer Programs
  • Computer Science
  • Computers
  • Data Storage Systems
  • Databases
  • Debugging
  • Heuristic Methods
  • Instruction Set Architecture
  • Language
  • Machine Languages
  • Operating Systems
  • Operations Research
  • Programming Languages

Fields of Study

  • Computer science

Readers

  • Computer Engineering
  • Computer Science.
  • Theoretical Analysis.