Maximum Data Rate Logic Array Development. Volume II. Appendices.
Abstract
;Contents: Transistor models-parameter measurement techniques; Current switch delay and rise-time analysis; Emitter-foller delay and rise-time analysis; Current-switch response to negative-going inputs; Common-base delay and rise-time analysis; Selected properties of two's complement coding.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1974
- Accession Number
- ADA008814
Entities
People
- Edwin A. Kelley
- James H. Flint
- James R. Gaskill Jr.
- John W. Klinechock
- Lawrence R. Weill