Fault Suppression in a Tree of Galois Linear Modules.

Abstract

Galois logic design has application to fault tolerant technology. Test vectors and test sequences have been found which test all single and many multiple stuck-at faults in standard Galois linear modules with built-in parity check logic. A straightforward method provides fault detection, location, and suppression in galois linear modules arranged in a GF(2 the 4th power) tree network having single spares at each level. A single standard module with input multiplexers for test selection and spare selection can be replicated with very minimal additional logic to form a complete linear tree having a high degree of fault tolerance. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1976
Accession Number
ADA021161

Entities

People

  • J. M. Marver

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Detection
  • Fault Tolerance
  • Sequences
  • Standards

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Fault Tolerant Diagnosis of Black and White Balloon Isolation Tests Using ¥.
  • Mathematical Modeling and Probability Theory.