High-Reliability, Low-Cost Integrated Circuits.
Abstract
Wafer fabrication for sample generation has been completed through metallization processing on all types except the CD4027B. Photographs showing step coverage of various gold thicknesses in contact regions and step coverage of the protective overcoat layer over the gold interconnects have been prepared to aid evaluation of the critical experiments. A two-layer protective structure with improved adherence to gold-metallized integrated circuits has been developed. Initial samples of the various integrated circuits are complete or near completion, and electrical characterization is under way. The required life-test facilities are nearing completion. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 1976
- Accession Number
- ADA030048