The Design of Totally Self-Checking Combinational Circuits.
Abstract
The output reliability of logic circuits can be increased by constructing them such that they are 'totally self-checking.' Totally self-checking circuits have their outputs encoded in an error-detecting code. By considering the modeling of potential hardware failures, circuit structure and output code, it is possible to construct circuits such that a failure within the circuit is indicated by a noncode output, and a code output indicates that the output is correct. This thesis discusses the relationship between hardware faults, circuit structures, and output codings. The 'path-fault secure' property is introduced and is used to develop a systematic design method for totally self-checking combinational circuits. The method places little restriction on the types of faults which may be assumed. Its applications to circuits with single and unidirectional fault assumptions are described in detail. In addition, other concepts are discussed which deal primarily with the interconnection of small totally self-checking circuits to form larger ones. These concepts also lead to systematic methods for constructing totally self-checking check circuits. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 01, 1976
- Accession Number
- ADA031430
Entities
People
- James Edward Smith
Organizations
- University of Illinois Urbana–Champaign