An Evaluation of Emitter Follower Logic.
Abstract
Emitter follower logic is a non-saturating logic family with medium speed capabilities. When manufactured by a modernized planar non-epitaxial bipolar process, consistently high yields with low defect densities are realized along with comparatively high device packing densities. The economical manufacturing technology coupled with the simplicity of emitter follower logic, provides a cost-effective means of approach to large scale and very large scale integrated circuit production. This report contains a description of the logic family, a history of the modernized planar process, descriptions and characteristics of emitter follower logic produced by this process and some examples of recently fabricated LSI and VLSI circuits. The report concludes with an evaluation of this technology. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1976
- Accession Number
- ADA033320
Entities
People
- Henry Domingos
- Peter M. Capani
Organizations
- Rome Laboratory