Data Flow Considerations in Implementing A Full Matrix Solver with Backing Store on the Cray-1.
Abstract
Techniques for the solution of full systems of simultaneous equations represent an important algorithm class for vector processors. This report considers the data flows involved in solving a full equation system on the Cray-1. This involves study of the I/O and memory-processor path traffic vis-a-vis the capabilities of the Cray-1 to support it. The I/O is found to present problems for small and large systems. Using an algorithms proposed in the report, the memory-processor path is shown to have excess bandwidth. Suggestions are made for utilizing this bandwidth to increase the arithmetic operation rate by modifying and expanding the processor architecture. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1976
- Accession Number
- ADA033378
Entities
People
- D. A. Orbits
- Donald Albert Calahan
Organizations
- University of Michigan