Planar CMOS/SOS Array Development.

Abstract

Three techniques for planarizing silicon-on-sapphire epitaxial islands are investigated. These three approaches are thermal oxidation isolation, ion-implantation isolation, and SIS (silicon-in-sapphire). N-channel MOS transistors fabricated using thermal oxidation isolation exhibit large edge leakage currents and are bias-temperature unstable. Stable p-channel MOS transistors can be fabricated if the field oxide is grown below 950 C in HCl steam. Test transistors fabricated using ion-implantation isolation show very large edge leakage current.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1976
Accession Number
ADA037752

Entities

People

  • Charles E. Weitzel

Organizations

  • RCA Corporation

Tags

DTIC Thesaurus Topics

  • Air Force
  • Ceramic Materials
  • Complementary Metal-Oxide Semiconductors
  • Electron Microscopes
  • Electron Microscopy
  • Electronics Laboratories
  • Engineering
  • Experimental Data
  • Field Effect Transistors
  • Films
  • Heat Treatment
  • Ion Implantation
  • Mass Spectrometry
  • Materials
  • Microscopes
  • Semiconductors
  • Standards

Fields of Study

  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Semiconductor Device Technology