C.vmp: The Analysis, Architecture and Implementation of a Fault Tolerant Multiprocessor.

Abstract

The architecture of a multiprocessor with a fault tolerant operating mode is described and analyzed. A bus level voter is used to satisfy the stringent design constraints of software transparency (programs form non-redundant versions will execute in a fault tolerant manner without modification), modularity, use of off-the-shelf components, and dynamic trading of performance for reliability. Bus level voting also allows handling of diverse system components (processors, memories, floppy disks, teletypes, etc.) in a uniform way. Models of performance degradation (20% slower than non-redundant on instruction execution rate, 50% slower on expected disk latency) and reliability improvement (both permanent and transient failures) are presented as well as experience in redundant system debugging, system initialization and switchover software, and initial performance measurements. The system, which is nearing completion, will be used to measure the occurrence of transient failures and to test fault tolerant bus protocols. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1976
Accession Number
ADA038633

Entities

People

  • Dan Siewiorek
  • Mark Canepa
  • Steve Clark

Organizations

  • Carnegie Mellon University

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Access Time
  • Communication Channels
  • Computer Programming
  • Computer Science
  • Computers
  • Debugging
  • Determinants (Mathematics)
  • Failure Mode And Effect Analysis
  • Fault Tolerance
  • Multiprocessors
  • Numbers
  • Operating Systems
  • Power Supplies
  • Reliability
  • Software Development
  • Standards
  • Statistics

Fields of Study

  • Computer science
  • Engineering

Readers

  • Computer Networking
  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Software Engineering