A Television Camera Input and Display Output Buffer System.
Abstract
A television camera input and display output buffer system has been designed and partially constructed as of January 1977. The system consists of a controller for selecting either of two camera inputs, a storage memory, a system controller, and a run-length encoder. The memory is easily expandable and currently consists of 4096 8-bit words. The system controller selects a rectangular section from any portion of a 512 x 512 digitized image. The section may be of any size from 512 x 8 to 1 x 1 to 8 x 512. The system performs a continuous display from the memory correctly interleaved with the incoming television camera input if desired. This display can take place simultaneously with input to the memory, displaying the old image while the new image is stored. The memory system allows maximum DMA rate transfers to and from an Adage AGT/30 host computer. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 1977
- Accession Number
- ADA040194
Entities
People
- J. N. England
Organizations
- North Carolina State University