Thin Film Memory Devices.
Abstract
Individual memory transistors have been developed which are ten times faster than previous transistors. Various charging mechanisms of the memory transistor were considered. It now appears that the high channel impedance model most accurately represents the slow negative WRITE behavior of the memory transistors. Addressing and control circuits were designed to permit practical operation of the memory in a block access mode. A WRITE mode was developed which greatly reduced the disturbance of non-addressed memory cells. A high density memory test array was designed and fabricated with operating memory cells. Sufficient knowledge and experience were gained through this work to permit us to make a practical nonvolatile thin film memory compatible with existing computer systems. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 15, 1977
- Accession Number
- ADA040576
Entities
People
- K. K. Yu
- P. R. Malmberg
- T. P. Brody